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Data Structures</h2></td></tr>
<tr class="memitem:"><td class="memItemLeft" align="right" valign="top">struct &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="struct_x_spi___stats.html">XSpi_Stats</a></td></tr>
<tr class="memdesc:"><td class="mdescLeft">&#160;</td><td class="mdescRight"><a class="el" href="struct_x_spi.html" title="The XSpi driver instance data. ">XSpi</a> statistics.  <a href="struct_x_spi___stats.html#details">More...</a><br /></td></tr>
<tr class="separator:"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:"><td class="memItemLeft" align="right" valign="top">struct &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="struct_x_spi___config.html">XSpi_Config</a></td></tr>
<tr class="memdesc:"><td class="mdescLeft">&#160;</td><td class="mdescRight">This typedef contains configuration information for the device.  <a href="struct_x_spi___config.html#details">More...</a><br /></td></tr>
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<tr class="memitem:"><td class="memItemLeft" align="right" valign="top">struct &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="struct_x_spi.html">XSpi</a></td></tr>
<tr class="memdesc:"><td class="mdescLeft">&#160;</td><td class="mdescRight">The <a class="el" href="struct_x_spi.html" title="The XSpi driver instance data. ">XSpi</a> driver instance data.  <a href="struct_x_spi.html#details">More...</a><br /></td></tr>
<tr class="separator:"><td class="memSeparator" colspan="2">&#160;</td></tr>
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Macros</h2></td></tr>
<tr class="memitem:gaa9075007c45d749e3b9bd24a37f9d908"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__spi__v4__1.html#gaa9075007c45d749e3b9bd24a37f9d908">XSpi_IntrGlobalEnable</a>(InstancePtr)</td></tr>
<tr class="memdesc:gaa9075007c45d749e3b9bd24a37f9d908"><td class="mdescLeft">&#160;</td><td class="mdescRight">This macro writes to the global interrupt enable register to enable interrupts from the device.  <a href="group__spi__v4__1.html#gaa9075007c45d749e3b9bd24a37f9d908">More...</a><br /></td></tr>
<tr class="separator:gaa9075007c45d749e3b9bd24a37f9d908"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga5035851f7c130da994d9deec67c89b5f"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__spi__v4__1.html#ga5035851f7c130da994d9deec67c89b5f">XSpi_IntrGlobalDisable</a>(InstancePtr)&#160;&#160;&#160;<a class="el" href="group__spi__v4__1.html#ga32e741800118678aa060ef2a13661e31">XSpi_WriteReg</a>(((InstancePtr)-&gt;BaseAddr),  <a class="el" href="group__spi__v4__1.html#ga3a66b8345fe53a19c2da1a8162dc366d">XSP_DGIER_OFFSET</a>, 0)</td></tr>
<tr class="memdesc:ga5035851f7c130da994d9deec67c89b5f"><td class="mdescLeft">&#160;</td><td class="mdescRight">This macro disables all interrupts for the device by writing to the Global interrupt enable register.  <a href="group__spi__v4__1.html#ga5035851f7c130da994d9deec67c89b5f">More...</a><br /></td></tr>
<tr class="separator:ga5035851f7c130da994d9deec67c89b5f"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga2210a78f1a4bc86250be33e8093e686c"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__spi__v4__1.html#ga2210a78f1a4bc86250be33e8093e686c">XSpi_IsIntrGlobalEnabled</a>(InstancePtr)</td></tr>
<tr class="memdesc:ga2210a78f1a4bc86250be33e8093e686c"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function determines if interrupts are enabled at the global level by reading the global interrupt register.  <a href="group__spi__v4__1.html#ga2210a78f1a4bc86250be33e8093e686c">More...</a><br /></td></tr>
<tr class="separator:ga2210a78f1a4bc86250be33e8093e686c"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga01dc10ba2ca5c1e5ff30ecd0cadac140"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__spi__v4__1.html#ga01dc10ba2ca5c1e5ff30ecd0cadac140">XSpi_IntrGetStatus</a>(InstancePtr)&#160;&#160;&#160;<a class="el" href="group__spi__v4__1.html#ga5e55891344ab473841b6eefc2bda35a2">XSpi_ReadReg</a>(((InstancePtr)-&gt;BaseAddr), <a class="el" href="group__spi__v4__1.html#ga2bc4dc18547b8bdd05c5eb2b73c9ff7d">XSP_IISR_OFFSET</a>)</td></tr>
<tr class="memdesc:ga01dc10ba2ca5c1e5ff30ecd0cadac140"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function gets the contents of the Interrupt Status Register.  <a href="group__spi__v4__1.html#ga01dc10ba2ca5c1e5ff30ecd0cadac140">More...</a><br /></td></tr>
<tr class="separator:ga01dc10ba2ca5c1e5ff30ecd0cadac140"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gab883b734cc9b78985dae611df2f4725a"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__spi__v4__1.html#gab883b734cc9b78985dae611df2f4725a">XSpi_IntrClear</a>(InstancePtr,  ClearMask)</td></tr>
<tr class="memdesc:gab883b734cc9b78985dae611df2f4725a"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function clears the specified interrupts in the Interrupt status Register.  <a href="group__spi__v4__1.html#gab883b734cc9b78985dae611df2f4725a">More...</a><br /></td></tr>
<tr class="separator:gab883b734cc9b78985dae611df2f4725a"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga85f2b8305794c31bc41ebd35ffeb4892"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__spi__v4__1.html#ga85f2b8305794c31bc41ebd35ffeb4892">XSpi_IntrEnable</a>(InstancePtr,  EnableMask)</td></tr>
<tr class="memdesc:ga85f2b8305794c31bc41ebd35ffeb4892"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function sets the contents of the Interrupt Enable Register.  <a href="group__spi__v4__1.html#ga85f2b8305794c31bc41ebd35ffeb4892">More...</a><br /></td></tr>
<tr class="separator:ga85f2b8305794c31bc41ebd35ffeb4892"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga48c1f7712f55bbb65d7b68c92b818f78"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__spi__v4__1.html#ga48c1f7712f55bbb65d7b68c92b818f78">XSpi_IntrDisable</a>(InstancePtr,  DisableMask)</td></tr>
<tr class="memdesc:ga48c1f7712f55bbb65d7b68c92b818f78"><td class="mdescLeft">&#160;</td><td class="mdescRight">Disable the specified Interrupts in the Interrupt Enable Register.  <a href="group__spi__v4__1.html#ga48c1f7712f55bbb65d7b68c92b818f78">More...</a><br /></td></tr>
<tr class="separator:ga48c1f7712f55bbb65d7b68c92b818f78"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga049583711085eb8c9c47b2ef7907bf43"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__spi__v4__1.html#ga049583711085eb8c9c47b2ef7907bf43">XSpi_IntrGetEnabled</a>(InstancePtr)&#160;&#160;&#160;<a class="el" href="group__spi__v4__1.html#ga5e55891344ab473841b6eefc2bda35a2">XSpi_ReadReg</a>(((InstancePtr)-&gt;BaseAddr),  <a class="el" href="group__spi__v4__1.html#gace876b867131a62e5407d440c73d6693">XSP_IIER_OFFSET</a>)</td></tr>
<tr class="memdesc:ga049583711085eb8c9c47b2ef7907bf43"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function gets the contents of the Interrupt Enable Register.  <a href="group__spi__v4__1.html#ga049583711085eb8c9c47b2ef7907bf43">More...</a><br /></td></tr>
<tr class="separator:ga049583711085eb8c9c47b2ef7907bf43"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga3a33f7848a49e60041668c726eb14110"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__spi__v4__1.html#ga3a33f7848a49e60041668c726eb14110">XSpi_SetControlReg</a>(InstancePtr,  Mask)&#160;&#160;&#160;<a class="el" href="group__spi__v4__1.html#ga32e741800118678aa060ef2a13661e31">XSpi_WriteReg</a>(((InstancePtr)-&gt;BaseAddr), <a class="el" href="group__spi__v4__1.html#ga3a63aa98328d40e3221901143e128da1">XSP_CR_OFFSET</a>, (Mask))</td></tr>
<tr class="memdesc:ga3a33f7848a49e60041668c726eb14110"><td class="mdescLeft">&#160;</td><td class="mdescRight">Set the contents of the control register.  <a href="group__spi__v4__1.html#ga3a33f7848a49e60041668c726eb14110">More...</a><br /></td></tr>
<tr class="separator:ga3a33f7848a49e60041668c726eb14110"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga7988663ef9d2523ef167413fd6e8ab87"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__spi__v4__1.html#ga7988663ef9d2523ef167413fd6e8ab87">XSpi_GetControlReg</a>(InstancePtr)&#160;&#160;&#160;<a class="el" href="group__spi__v4__1.html#ga5e55891344ab473841b6eefc2bda35a2">XSpi_ReadReg</a>(((InstancePtr)-&gt;BaseAddr), <a class="el" href="group__spi__v4__1.html#ga3a63aa98328d40e3221901143e128da1">XSP_CR_OFFSET</a>)</td></tr>
<tr class="memdesc:ga7988663ef9d2523ef167413fd6e8ab87"><td class="mdescLeft">&#160;</td><td class="mdescRight">Get the contents of the control register.  <a href="group__spi__v4__1.html#ga7988663ef9d2523ef167413fd6e8ab87">More...</a><br /></td></tr>
<tr class="separator:ga7988663ef9d2523ef167413fd6e8ab87"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaf65c9e65699c1746d205a77554d40adb"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__spi__v4__1.html#gaf65c9e65699c1746d205a77554d40adb">XSpi_GetStatusReg</a>(InstancePtr)&#160;&#160;&#160;<a class="el" href="group__spi__v4__1.html#ga5e55891344ab473841b6eefc2bda35a2">XSpi_ReadReg</a>(((InstancePtr)-&gt;BaseAddr), <a class="el" href="group__spi__v4__1.html#gae4915bf726554a2abf5922129f88542b">XSP_SR_OFFSET</a>)</td></tr>
<tr class="memdesc:gaf65c9e65699c1746d205a77554d40adb"><td class="mdescLeft">&#160;</td><td class="mdescRight">Get the contents of the status register.  <a href="group__spi__v4__1.html#gaf65c9e65699c1746d205a77554d40adb">More...</a><br /></td></tr>
<tr class="separator:gaf65c9e65699c1746d205a77554d40adb"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga91ec4e1ee207bcb26d5aaf84e0324a9e"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__spi__v4__1.html#ga91ec4e1ee207bcb26d5aaf84e0324a9e">XSpi_SetXipControlReg</a>(InstancePtr,  Mask)&#160;&#160;&#160;<a class="el" href="group__spi__v4__1.html#ga32e741800118678aa060ef2a13661e31">XSpi_WriteReg</a>(((InstancePtr)-&gt;BaseAddr), <a class="el" href="group__spi__v4__1.html#ga3a63aa98328d40e3221901143e128da1">XSP_CR_OFFSET</a>, (Mask))</td></tr>
<tr class="memdesc:ga91ec4e1ee207bcb26d5aaf84e0324a9e"><td class="mdescLeft">&#160;</td><td class="mdescRight">Set the contents of the XIP control register.  <a href="group__spi__v4__1.html#ga91ec4e1ee207bcb26d5aaf84e0324a9e">More...</a><br /></td></tr>
<tr class="separator:ga91ec4e1ee207bcb26d5aaf84e0324a9e"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaac0eb471df51c6af1a3a0a68b68d3808"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__spi__v4__1.html#gaac0eb471df51c6af1a3a0a68b68d3808">XSpi_GetXipControlReg</a>(InstancePtr)&#160;&#160;&#160;<a class="el" href="group__spi__v4__1.html#ga5e55891344ab473841b6eefc2bda35a2">XSpi_ReadReg</a>(((InstancePtr)-&gt;BaseAddr), <a class="el" href="group__spi__v4__1.html#ga3a63aa98328d40e3221901143e128da1">XSP_CR_OFFSET</a>)</td></tr>
<tr class="memdesc:gaac0eb471df51c6af1a3a0a68b68d3808"><td class="mdescLeft">&#160;</td><td class="mdescRight">Get the contents of the XIP control register.  <a href="group__spi__v4__1.html#gaac0eb471df51c6af1a3a0a68b68d3808">More...</a><br /></td></tr>
<tr class="separator:gaac0eb471df51c6af1a3a0a68b68d3808"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga3b64cb823a81025224b87a5d26a4fa39"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__spi__v4__1.html#ga3b64cb823a81025224b87a5d26a4fa39">XSpi_GetXipStatusReg</a>(InstancePtr)&#160;&#160;&#160;<a class="el" href="group__spi__v4__1.html#ga5e55891344ab473841b6eefc2bda35a2">XSpi_ReadReg</a>(((InstancePtr)-&gt;BaseAddr), <a class="el" href="group__spi__v4__1.html#gae4915bf726554a2abf5922129f88542b">XSP_SR_OFFSET</a>)</td></tr>
<tr class="memdesc:ga3b64cb823a81025224b87a5d26a4fa39"><td class="mdescLeft">&#160;</td><td class="mdescRight">Get the contents of the status register.  <a href="group__spi__v4__1.html#ga3b64cb823a81025224b87a5d26a4fa39">More...</a><br /></td></tr>
<tr class="separator:ga3b64cb823a81025224b87a5d26a4fa39"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gae93befb10305b5abccc5483b73e60060"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__spi__v4__1.html#gae93befb10305b5abccc5483b73e60060">XSpi_SetSlaveSelectReg</a>(InstancePtr,  Mask)&#160;&#160;&#160;<a class="el" href="group__spi__v4__1.html#ga32e741800118678aa060ef2a13661e31">XSpi_WriteReg</a>(((InstancePtr)-&gt;BaseAddr), <a class="el" href="group__spi__v4__1.html#ga34c2ab4de85d2a3a5659e5446235942c">XSP_SSR_OFFSET</a>, (Mask))</td></tr>
<tr class="memdesc:gae93befb10305b5abccc5483b73e60060"><td class="mdescLeft">&#160;</td><td class="mdescRight">Set the contents of the slave select register.  <a href="group__spi__v4__1.html#gae93befb10305b5abccc5483b73e60060">More...</a><br /></td></tr>
<tr class="separator:gae93befb10305b5abccc5483b73e60060"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga5c8ab7387ce196ce3309dc68bd15e489"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__spi__v4__1.html#ga5c8ab7387ce196ce3309dc68bd15e489">XSpi_GetSlaveSelectReg</a>(InstancePtr)&#160;&#160;&#160;<a class="el" href="group__spi__v4__1.html#ga5e55891344ab473841b6eefc2bda35a2">XSpi_ReadReg</a>((InstancePtr)-&gt;BaseAddr, <a class="el" href="group__spi__v4__1.html#ga34c2ab4de85d2a3a5659e5446235942c">XSP_SSR_OFFSET</a>)</td></tr>
<tr class="memdesc:ga5c8ab7387ce196ce3309dc68bd15e489"><td class="mdescLeft">&#160;</td><td class="mdescRight">Get the contents of the slave select register.  <a href="group__spi__v4__1.html#ga5c8ab7387ce196ce3309dc68bd15e489">More...</a><br /></td></tr>
<tr class="separator:ga5c8ab7387ce196ce3309dc68bd15e489"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga1ddf2c25474dac11bd30c9f938bd753d"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__spi__v4__1.html#ga1ddf2c25474dac11bd30c9f938bd753d">XSpi_Enable</a>(InstancePtr)</td></tr>
<tr class="memdesc:ga1ddf2c25474dac11bd30c9f938bd753d"><td class="mdescLeft">&#160;</td><td class="mdescRight">Enable the device and uninhibit master transactions.  <a href="group__spi__v4__1.html#ga1ddf2c25474dac11bd30c9f938bd753d">More...</a><br /></td></tr>
<tr class="separator:ga1ddf2c25474dac11bd30c9f938bd753d"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga642e3f4be4784f5823c368a0afdfe078"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__spi__v4__1.html#ga642e3f4be4784f5823c368a0afdfe078">XSpi_Disable</a>(InstancePtr)</td></tr>
<tr class="memdesc:ga642e3f4be4784f5823c368a0afdfe078"><td class="mdescLeft">&#160;</td><td class="mdescRight">Disable the device.  <a href="group__spi__v4__1.html#ga642e3f4be4784f5823c368a0afdfe078">More...</a><br /></td></tr>
<tr class="separator:ga642e3f4be4784f5823c368a0afdfe078"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr><td colspan="2"><div class="groupHeader">Configuration options</div></td></tr>
<tr><td colspan="2"><div class="groupText"><p>The following options may be specified or retrieved for the device and enable/disable additional features of the SPI.</p>
<p>Each of the options are bit fields, so more than one may be specified. </p>
</div></td></tr>
<tr class="memitem:gac2c043a14b04e38a61b1979ccaa8a200"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__spi__v4__1.html#gac2c043a14b04e38a61b1979ccaa8a200">XSP_MASTER_OPTION</a>&#160;&#160;&#160;0x1</td></tr>
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<tr class="memitem:gaae8f6e43593b5e57c47c4834f69a01a9"><td class="memItemLeft" align="right" valign="top">
#define&#160;</td><td class="memItemRight" valign="bottom"><b>XSP_CLK_ACTIVE_LOW_OPTION</b>&#160;&#160;&#160;0x2</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XSP_CLK_PHASE_1_OPTION</b>&#160;&#160;&#160;0x4</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XSP_LOOPBACK_OPTION</b>&#160;&#160;&#160;0x8</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XSP_MANUAL_SSELECT_OPTION</b>&#160;&#160;&#160;0x10</td></tr>
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<tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="typedef-members"></a>
Typedefs</h2></td></tr>
<tr class="memitem:ga07ccc0ae5e77f261e02c22b8275c43c8"><td class="memItemLeft" align="right" valign="top">typedef void(*&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__spi__v4__1.html#ga07ccc0ae5e77f261e02c22b8275c43c8">XSpi_StatusHandler</a>) (void *CallBackRef, u32 StatusEvent, unsigned int ByteCount)</td></tr>
<tr class="memdesc:ga07ccc0ae5e77f261e02c22b8275c43c8"><td class="mdescLeft">&#160;</td><td class="mdescRight">The handler data type allows the user to define a callback function to handle the asynchronous processing of the SPI driver.  <a href="group__spi__v4__1.html#ga07ccc0ae5e77f261e02c22b8275c43c8">More...</a><br /></td></tr>
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<tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="func-members"></a>
Functions</h2></td></tr>
<tr class="memitem:gaa1fb3e31ba804cc87dc309847fb02471"><td class="memItemLeft" align="right" valign="top">int&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__spi__v4__1.html#gaa1fb3e31ba804cc87dc309847fb02471">XSpi_Initialize</a> (<a class="el" href="struct_x_spi.html">XSpi</a> *InstancePtr, u16 DeviceId)</td></tr>
<tr class="memdesc:gaa1fb3e31ba804cc87dc309847fb02471"><td class="mdescLeft">&#160;</td><td class="mdescRight">Initializes a specific <a class="el" href="struct_x_spi.html" title="The XSpi driver instance data. ">XSpi</a> instance such that the driver is ready to use.  <a href="group__spi__v4__1.html#gaa1fb3e31ba804cc87dc309847fb02471">More...</a><br /></td></tr>
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<tr class="memitem:gac2c4a169e05ad6e040796ae86100fd5b"><td class="memItemLeft" align="right" valign="top"><a class="el" href="struct_x_spi___config.html">XSpi_Config</a> *&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__spi__v4__1.html#gac2c4a169e05ad6e040796ae86100fd5b">XSpi_LookupConfig</a> (u16 DeviceId)</td></tr>
<tr class="memdesc:gac2c4a169e05ad6e040796ae86100fd5b"><td class="mdescLeft">&#160;</td><td class="mdescRight">Looks up the device configuration based on the unique device ID.  <a href="group__spi__v4__1.html#gac2c4a169e05ad6e040796ae86100fd5b">More...</a><br /></td></tr>
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<tr class="memitem:ga858155b42d5a1da8efe06c9098e40b2d"><td class="memItemLeft" align="right" valign="top">int&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__spi__v4__1.html#ga858155b42d5a1da8efe06c9098e40b2d">XSpi_CfgInitialize</a> (<a class="el" href="struct_x_spi.html">XSpi</a> *InstancePtr, <a class="el" href="struct_x_spi___config.html">XSpi_Config</a> *Config, UINTPTR EffectiveAddr)</td></tr>
<tr class="memdesc:ga858155b42d5a1da8efe06c9098e40b2d"><td class="mdescLeft">&#160;</td><td class="mdescRight">Initializes a specific <a class="el" href="struct_x_spi.html" title="The XSpi driver instance data. ">XSpi</a> instance such that the driver is ready to use.  <a href="group__spi__v4__1.html#ga858155b42d5a1da8efe06c9098e40b2d">More...</a><br /></td></tr>
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<tr class="memitem:ga87fdaad742a2669200c9b2617e5c86ea"><td class="memItemLeft" align="right" valign="top">int&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__spi__v4__1.html#ga87fdaad742a2669200c9b2617e5c86ea">XSpi_Start</a> (<a class="el" href="struct_x_spi.html">XSpi</a> *InstancePtr)</td></tr>
<tr class="memdesc:ga87fdaad742a2669200c9b2617e5c86ea"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function enables interrupts for the SPI device.  <a href="group__spi__v4__1.html#ga87fdaad742a2669200c9b2617e5c86ea">More...</a><br /></td></tr>
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<tr class="memitem:gad4bb67cfcfe73844ffb1917b11d5284c"><td class="memItemLeft" align="right" valign="top">int&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__spi__v4__1.html#gad4bb67cfcfe73844ffb1917b11d5284c">XSpi_Stop</a> (<a class="el" href="struct_x_spi.html">XSpi</a> *InstancePtr)</td></tr>
<tr class="memdesc:gad4bb67cfcfe73844ffb1917b11d5284c"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function stops the SPI device by disabling interrupts and disabling the device itself.  <a href="group__spi__v4__1.html#gad4bb67cfcfe73844ffb1917b11d5284c">More...</a><br /></td></tr>
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<tr class="memitem:ga343938fcdf672bec329d876a146178cd"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__spi__v4__1.html#ga343938fcdf672bec329d876a146178cd">XSpi_Reset</a> (<a class="el" href="struct_x_spi.html">XSpi</a> *InstancePtr)</td></tr>
<tr class="memdesc:ga343938fcdf672bec329d876a146178cd"><td class="mdescLeft">&#160;</td><td class="mdescRight">Resets the SPI device by writing to the Software Reset register.  <a href="group__spi__v4__1.html#ga343938fcdf672bec329d876a146178cd">More...</a><br /></td></tr>
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<tr class="memitem:ga162523a3e9b29f063701db303ac8cf17"><td class="memItemLeft" align="right" valign="top">int&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__spi__v4__1.html#ga162523a3e9b29f063701db303ac8cf17">XSpi_SetSlaveSelect</a> (<a class="el" href="struct_x_spi.html">XSpi</a> *InstancePtr, u32 SlaveMask)</td></tr>
<tr class="memdesc:ga162523a3e9b29f063701db303ac8cf17"><td class="mdescLeft">&#160;</td><td class="mdescRight">Selects or deselect the slave with which the master communicates.  <a href="group__spi__v4__1.html#ga162523a3e9b29f063701db303ac8cf17">More...</a><br /></td></tr>
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<tr class="memitem:ga8043891b8f68a3291bd035be74aa6b94"><td class="memItemLeft" align="right" valign="top">u32&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__spi__v4__1.html#ga8043891b8f68a3291bd035be74aa6b94">XSpi_GetSlaveSelect</a> (<a class="el" href="struct_x_spi.html">XSpi</a> *InstancePtr)</td></tr>
<tr class="memdesc:ga8043891b8f68a3291bd035be74aa6b94"><td class="mdescLeft">&#160;</td><td class="mdescRight">Gets the current slave select bit mask for the SPI device.  <a href="group__spi__v4__1.html#ga8043891b8f68a3291bd035be74aa6b94">More...</a><br /></td></tr>
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<tr class="memitem:ga4c44c082ef2d2b9cf4ba3db8bcebd954"><td class="memItemLeft" align="right" valign="top">int&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__spi__v4__1.html#ga4c44c082ef2d2b9cf4ba3db8bcebd954">XSpi_Transfer</a> (<a class="el" href="struct_x_spi.html">XSpi</a> *InstancePtr, u8 *SendBufPtr, u8 *RecvBufPtr, unsigned int ByteCount)</td></tr>
<tr class="memdesc:ga4c44c082ef2d2b9cf4ba3db8bcebd954"><td class="mdescLeft">&#160;</td><td class="mdescRight">Transfers the specified data on the SPI bus.  <a href="group__spi__v4__1.html#ga4c44c082ef2d2b9cf4ba3db8bcebd954">More...</a><br /></td></tr>
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<tr class="memitem:gabc09f4d503de2a772e5079ac46fc62b6"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__spi__v4__1.html#gabc09f4d503de2a772e5079ac46fc62b6">XSpi_SetStatusHandler</a> (<a class="el" href="struct_x_spi.html">XSpi</a> *InstancePtr, void *CallBackRef, <a class="el" href="group__spi__v4__1.html#ga07ccc0ae5e77f261e02c22b8275c43c8">XSpi_StatusHandler</a> FuncPtr)</td></tr>
<tr class="memdesc:gabc09f4d503de2a772e5079ac46fc62b6"><td class="mdescLeft">&#160;</td><td class="mdescRight">Sets the status callback function, the status handler, which the driver calls when it encounters conditions that should be reported to the higher layer software.  <a href="group__spi__v4__1.html#gabc09f4d503de2a772e5079ac46fc62b6">More...</a><br /></td></tr>
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<tr class="memitem:gaf3863f11d27469d8797424319601c980"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__spi__v4__1.html#gaf3863f11d27469d8797424319601c980">XSpi_InterruptHandler</a> (void *InstancePtr)</td></tr>
<tr class="memdesc:gaf3863f11d27469d8797424319601c980"><td class="mdescLeft">&#160;</td><td class="mdescRight">The interrupt handler for SPI interrupts.  <a href="group__spi__v4__1.html#gaf3863f11d27469d8797424319601c980">More...</a><br /></td></tr>
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<tr class="memitem:ga11b6ebdb6f69c6939176e05600b10e3e"><td class="memItemLeft" align="right" valign="top">int&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__spi__v4__1.html#ga11b6ebdb6f69c6939176e05600b10e3e">XSpi_SelfTest</a> (<a class="el" href="struct_x_spi.html">XSpi</a> *InstancePtr)</td></tr>
<tr class="memdesc:ga11b6ebdb6f69c6939176e05600b10e3e"><td class="mdescLeft">&#160;</td><td class="mdescRight">Runs a self-test on the driver/device.  <a href="group__spi__v4__1.html#ga11b6ebdb6f69c6939176e05600b10e3e">More...</a><br /></td></tr>
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<tr class="memitem:ga8a40aee30eb6f0240b75e6ccd7596a53"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__spi__v4__1.html#ga8a40aee30eb6f0240b75e6ccd7596a53">XSpi_GetStats</a> (<a class="el" href="struct_x_spi.html">XSpi</a> *InstancePtr, <a class="el" href="struct_x_spi___stats.html">XSpi_Stats</a> *StatsPtr)</td></tr>
<tr class="memdesc:ga8a40aee30eb6f0240b75e6ccd7596a53"><td class="mdescLeft">&#160;</td><td class="mdescRight">Gets a copy of the statistics for an SPI device.  <a href="group__spi__v4__1.html#ga8a40aee30eb6f0240b75e6ccd7596a53">More...</a><br /></td></tr>
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<tr class="memitem:gaf243ac522e14869af82545ffc11d5821"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__spi__v4__1.html#gaf243ac522e14869af82545ffc11d5821">XSpi_ClearStats</a> (<a class="el" href="struct_x_spi.html">XSpi</a> *InstancePtr)</td></tr>
<tr class="memdesc:gaf243ac522e14869af82545ffc11d5821"><td class="mdescLeft">&#160;</td><td class="mdescRight">Clears the statistics for the SPI device.  <a href="group__spi__v4__1.html#gaf243ac522e14869af82545ffc11d5821">More...</a><br /></td></tr>
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<tr class="memitem:ga67c2076b133a55b6f80343642a1ace41"><td class="memItemLeft" align="right" valign="top">int&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__spi__v4__1.html#ga67c2076b133a55b6f80343642a1ace41">XSpi_SetOptions</a> (<a class="el" href="struct_x_spi.html">XSpi</a> *InstancePtr, u32 Options)</td></tr>
<tr class="memdesc:ga67c2076b133a55b6f80343642a1ace41"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function sets the options for the SPI device driver.  <a href="group__spi__v4__1.html#ga67c2076b133a55b6f80343642a1ace41">More...</a><br /></td></tr>
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<tr class="memitem:gaf55cfd2072ed2047c0fe0b65bd0fcf6a"><td class="memItemLeft" align="right" valign="top">u32&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__spi__v4__1.html#gaf55cfd2072ed2047c0fe0b65bd0fcf6a">XSpi_GetOptions</a> (<a class="el" href="struct_x_spi.html">XSpi</a> *InstancePtr)</td></tr>
<tr class="memdesc:gaf55cfd2072ed2047c0fe0b65bd0fcf6a"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function gets the options for the SPI device.  <a href="group__spi__v4__1.html#gaf55cfd2072ed2047c0fe0b65bd0fcf6a">More...</a><br /></td></tr>
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